Computer means for use with scales



16 Sheets-Sheet l H. J. CICHANOWICZ ETAL.

COMBUTER MEANS FOR USE WITH SCALES July 16, 1968 Filed Aug. 2 1. 1965 July 16, 1968 H. J, clcHANowlcz ETAL 3,393,302

COMPUTER MEANS FOR USE WITH SCALES Filed Aug. 2l, 1963 16 Sheets-Sheet 2 FIG. 2 SN FLIP FLOPS GQS OSCTJIQET M SCALE n oi 259m xzx Q 5 1.0 6 'OO` )al /276 A C2) 25o 2x7 23 235 F22 x22 f2?? B H A x22 l me 23o 234 F23 249 .O1 lb. 237 x23 *204 m 2 3 f276 C sA f v246 f279 D 2|5 229 233 F24 X24 236 NOR MOTION GATES DETECTOR D 4 SA x24 |07 |08 2|4 228 232 EDPT-f A 267 -H4227 1 BHDIFFT-)H 213A D Hw, 246 257 266 203 mc H 245 256 265 A'Avlv 225 im 2|2 224 FMT-H 2u B 24' 252 26| @--i-0 B-|D|FF}H llb. 222 202 agc 24o D No LOAD SENSE @-44 l 207 22o 824` CLOCK 820 X|9"`n |N2H1BU' A 73 @-44- /IOID 206 2|9 INVENTORS \20| B HENRY d. CICHANOWICZ VA, CLAYTON c. DEwxTT @M d/nr l/W 2803 TTYS. PRINTER RESET LEAD July 16, 1968 H. J. clcHANowlcz ETAL. 3,393,302

COMPUTER MEANS FOR USE WITH SCALES Filed Aug. 2l. 1963 X7 F7 27e 300 16 Sheets-Sheet 3 CODE TRANSLATOR L O.

INVERSION NO INVERSION BACK WA RD COUNTER DIGITAL RESET INVENTORS HENRY J. CICHANOWICZ CLAYTON C. DEWITT ATTYS.

July 16, 1968 H. 1. clcHANowlcz E'rAL 3,393,302l

COMPUTER MEANS FOR USE WITH SCALES Filed Aug. 2l. 1963 16 Sheets-Sheet 4 FORWARD F16. 4 |20 RR|CE 4| COHAZITER LOG|C 11i swncmzs PRlcE --R I 2 34 5 6 7 8 9 SEQUENCE CIRCUIT DOLLARS DIGITAL RESET X3|X4-T INVENTORS HENRY J. clcHANowlcz 4| 2 Al 3 CLAYTON c. uEwlTT ATTYs.

July 16, 1968 I-I. I. cIcI-IANowIcz .ETAL 3,393,302

COMPUTER MEANS FOR USE WITH SCALES Filed Aug. 2l, 1965 16 Sheets-Sheet 5 FIG. 5 IOIb. IIb. .IIb..OIIb.$ D PARTIAL PRODUCT (PRICE) ACCUMULATORS III@ 42 WEIGHT SEQUENCE CIRCUIT XII IOIb.

CARRY ROUND OFF '7 WEIGHT U5. ACCUMULATORS IO lb.

INVENTORS HENRY J. cIcI-IANowIcZ CLAYTON c. oEwITT xII xIa BYMQM aaa ,M

ATTYS- July 16, 1968 I-I. J. clcHANowIcz ETAL 3,393,302

COMPUTER MEANS FOR USE WITH SCALES Filed Aug. 2l, 1963 16 Sheets-Sheet 6 PRICE DECDE FIG. 6

COLf'fyTE s SIO OECAOE COUNTER glo 5 R 570) :E DI -R F25 CARRY ET e" PRINT 57|J CONTROL @I R y CIRCUIT 9' O2 F26 45 572 I Si SI2 GOO 6 R E 62| R" p|NT C@J l d] CONTROL 625 636 s IO D3 F27 eIs ETF- D3 CARRY B 575 O4 risa?l I 80| D4 576 622 CARRY R PRINT *tl 5"-' 'I77J I .PI DECAOE COUNTER @am C0,15L' c26\637 R PRINT $.IO .OOI 7B-p $.IO OECAOE COUNTER CO3 603A @gli COIROL 527%@ 624 R PRINT 50| CARRY I OV--- 579,' -LIIOI OECADE COUNTER CO4 604A* 6.8. CONTROLGZBIGSQ 8.000 IIOOI OECAOE COUNTER CO5 T :wl 58o'a l 605A* eIs .OOOI OECAOE COUNTER eos IL-[DJ IO lb. s SOGAI 620 650 R1 PRINT m WEIGHT OECADE ,fhygL--Tg "It" L -ho LB oEcczsCrTI-:Rll-OT 3513i. PSI/NT 582E GOYA CONTROL com 652 u I I R PRINT .I Ib .I Ib. -MLB. OECADE COUNTER eos I 0v.--- /I 5*-*839 GOB/ CONTROL cal 642 653 v L -MLB. DECAOE COUNTER CO9} 5 R- PI/NT .OIIIE` 508|? l 609A 1 CONTROL ,.32633 MILE. DECAOE COUNTER elol R- PRLNT ELEAO CIOA I 0' -644 ,L CONTROL 33 f u 635 x xI4 635 I' "l'6'4'5 INVENTORS HENRY J. CICHANOWICZ CLAYTON C. DEWITT BY ATTYS.

July 16, 1968 H. J. clcHANowlcz ETAL 3,393,302

COMPUTER MEANS FOR USE WITH SCALES Filed AJg- 2l. 1965 16 Sheets-Sheet 'i GIB MECHANICAL LINKAGE 645 ELECTRICAL LINKAGE IOLE ILB LOIL $I0 w $.I0 $.01 $l $.i0 $.0I

0 64I 642 643 636 637 63B 659 709 710 7II PR CE PER WEIGHT PIOUND pnmr 7a3 7|4 MOTOR 7|2 7I3A |7158; l l

I l l l l 1 1 l I 742 743 744 l l 750 i E 150 I I L PRINTER RESET LEAD (FIG.2) 645 INVENTORS HENRY J. clcHANowxcz CLAYTON c. DEwlTT BY ATTYS.

July 16, 1968 I-I. I. cIcI-IANowIcz ET COMPUTER MEANS FOR USE Wl'I-I SCALES FI G. 8

Filed Aug. 2.1. 19

LOGIC INPUT CABLE (LICI 824k 820 XI91 16 Sheets-Sheet 8 CLOCK /INHIBIT LOGIC OUTPUT CABLE (LOC) m SCALE SEQUENCE 1&2.

\ E Io Ib.2o| I Ibrzoa .II

WEIGHT PRocRAII/I 805 806 CLOCK BII eoI 804 To (SIS WEIGHT CONTROL @i /BIS IIIIIIIIIIII JII XXXX

LOGIC INPUT III LOGIC SEQUENCE CIRCUIT- III (f(((ffffffffffffffffffff(ff no www ma feI 5 INVENTORS HENRY J. CICHANOWICZ CLAYTON ,C. DEWITT ATTYS.

July 16, 1968 H. J. cIcHANoWICz ETAL COMPUTER MEANS FOR USE WITH SCALES Filed Aug. 2l 1963 16 Sheets-Sheet 9 July 16, 196s H. J, CICHANOWICZ ETAI..

COMPUTER MEANS FOR USE WITH SCALES Filed Aug. 2l., 1963 LOGIC SEQUENCE CIRCUIT HENRY J. CI CHANOWICZ CLAYTON C. DEWITT ATTYS.

July 16, 1968 H.J. clcHANowlcz ETAL. l 3,393,302

COMPUTER MEANS FOR USE WITH SCALES Filed Aug. 2l. 1965 16 Sheets-Shes*` ll FIG.||

INVENTORS HENRY J CICHANOWICZ CLAYTON C. DEWITT ATTYS July 16, 1968 H. J. cIcI-IANowIcz Iz'rIM.v 3,393,302

COMPUTER MEANS FOR USE WITH SCALES Filed Aug. 2l 1963 16 Sheets-Sheet 12 FIG.I2 l

' 7I xI4 B-'5--1 4 v 634 635 I I J Izofmb IZOSA PRINTER I xIaIII C I4I2I START (JaoI @20H 920s) CONTROL C 1203- I2o4 |205 .28. @A N 935x R xm m4 IIzoII im PRINTER SEQUENCE CIRCUIT 12.2

INVENTORS HENRY J. cIcHANowICZ CLAYTON c. DEwITT BY July 16, 1968 H. J. clcHANowlcz ETAT. 3,393,302

COMPUTER MEANS V-OR USE WITH SCALES Filed Aug. 2 1. 196s 1e sheets-sheer 1s ATTYS.

July 1s, 1968 Filed Aug. 2 1. 1983 FIG, I6 A xls ST H. J. CICHANOWICZ ETAL.

COMPUTER MEANS POR USE WITH SCALES FLIP-FLOP 1gam DC RESET 27K XIS SET I v 16 Sheets-Sheet 14 FIG. I6 B @Jag INVENTORS HENRY J. clcHANowlcz CLAYTON c. DEwlTT ATTYS.

July 16, 1968 Filed Aug. 2l 1963 il` J. CICHANOWICZ ETAL.

COMPUTER MEANS FOR USE WITH SCALES 16 Sheets-Sheet l5 July 16, 1968 H. J. cIcHANowIcz ETAI.. 3,393,302

COMPUTER MEANS FOR USE WITH SCALES Filed Aug. 21. 1953 16 Sheets-Sheet 16 FIG. I5A

PRINT WHEEL CONTROL NORM'l-ILLY` NORh-AALLY |2V STOP CIRCUIT gmug ,",gECRONDUCT'NG SOLENOID TRANSISTOR TRANSISTOR IzO 4v -I2J 2 0 2.2K AM |20 "'ZII.

0 82o PF IN27O -II IOOI 'K FIG. ISB FIG. Isc

NOR GATE -Izv NOR GATE IOK A *2K INPUT INPUT IOv OR -IzvI OUTPUT OUTPUT IOv OR -IavI INPUT Y Iov OR -I2vI INPUT IOv OR -IzvI FIG. I5 E +I2v ov ANO GATE INPUT FIG. I5D l INPUT D- OUTPUT INPUT AND GATE -Izv 24K FIG. I5F INPUT 'NZS INI-IIBIT GATE (Ov OR -I2vI INHIBIT INPUT OUTPUT IOv OR -IzvI "l Iov OR -IzvI INPUT iD'- OUTPUT INPUT IOv OR -IzvI *l INVENTORS HENRY J. CICHANOWICZ CLAYTON C. DEWITT ATTYS.

United States Patent O M 3,393,302 COMPUTER MEANS FOR USE WITH SCALES Henry J. Cichanowicz, Galion, Ohio, and Clayton C. De

Witt, Torrance, Calif., assignors to North Electric Company, Galion, Ohio, a corporation of Ohio Filed Aug. 21, 1963, Ser. No. 303,644 23 Claims. (Cl. 23S-151.33)

The present invention relates to weighing scales and more specifically to price and weight computation means which form a part therewith.

In supermarkets, butcher-shops, and the like, weighing scales are provided comprising a weighing scale proper, a computer, and a labeler including printer means which are adapted to mark packages `and print labels which have printed thereon the weight, the price per pound, and the total price.

In the use thereof to weigh an article, the attendent Would first manually turn three dials (dollars, dimes, and cents) on the labeler to represent the price per pound. Thereupon he would place the article to be weighed on the scale. As a result thereof, the scale provides the weight to the computer which in turn uses this information together with the price per pound from the labeler to compute the total price. The weight and total price determined by the computer enable the la'beler to print the individual label for the package being weighed. The operator then removes the package from the scale, and attaches the individual label thereto. Thereupon the operator places another package containing an article on the scale, and the process is repeated until all the packages have been weighed and labeled. If the next batch of goods to be weighed bears `a different price per pound, the manual setting of the dials is adjusted before the weighing operation is initiated.

While electromagnetic relay arrangements are known in the prior art to operate in such manner, it is considered desirable to provide computer means which are less bulky, less cumbersome and faster in operation. It is one object of the present invention therefore to provide an electronic computer for such a scale, and particularly a computer of such type which basically uses solid state components.

A specific lobject of the invention is to provide a system for weighing articles providing a price therefor which includes price register means which are adjustable by an attendant to register the price of the article per unit weight, a scale device which provides electrical signals representative of the weight of the article, a counting device which includes means for registering the different digits representing the weight `of the article, means for operating the counter in a reverse count to determine the value of the digits marked thereon, and computer means operatively controlled by the counter means and the price register means to compute the product of the price registered on said price register means and the weight of the article marked on the counter means.

It is a further object of the invention to provide a computer arrangement of such type which includes motion detection means for detecting motion of the weighing mechanism indicated by the changing value of the electrical signals, and inhibit means for preventing system operation during the period of motion detection.

It is yet another -object of the invention to provide sequence control means in such type arrangement which includes weight sequence means for controlling marking of the digits which represent the weight `on said counter in a predetermined sequence, and in which the counter means are operative to determine the value of each digit as marked there-on by a reverse counting operation.

It is yet another object of the invention to provide a computing system for a signal of the type set forth in which the electrical signals provided by the signal device 3,393,302 Patented July 16, 1968 to the counter means are in a binary decimal reected code, and which further includes means for translating such signals to a non-reflected form of the code.

It is yet another object of the invention to provide computer means of the type set forth in which the price register means includes means operative with each step on-the counter in determining the value of the digit marked thereon to compute signals representative of partial product information of the price registered on the price register means and one count of the digit marked on the counter means.

It is a further lobject of the invention to provide a computer means of the type described above which includes a plurality of decade counter means having means operative with the price register means and the counter means to register the product of the price and the weight of the article, and print means c-onnected to the decade counter to provide a printed record of such product.

It is an additional object of the invention to provide a computer system of the type disclosed which includes novel print means for providing a printed record of the product of the weight and price per pound including a set of print wheels, each of which has ten different decimal digits disposed thereon in sequence and each of which is operative to print the value of the digit which is stored in a different one of the decade means, means for initially setting each of the print wheels to the digit nine print position, pulse means for advancing the value of the digit in each of the decade counters one unit higher, and simultaneously stepping each of the wheels to a print position one unit lower, yand means for stepping each print wheel as its associated decade counter advances to ythe digit zero, whereby the digit wheel will be operative to print the digit initially registered on its associated decade counter.

These and other advantages of the present invention will become apparent with reference to the following specification and accompanying drawings wherein basic embodiments of the structure are illustrated, and in which:

FIGURE l sets forth a block diagram of the system;

FIGURES 2-12 set forth a logic diagram of the system;

FIGURE 13A sets forth a circuit diagram of a Differential Amplifier and Flip-Flop of FIGURE 2;

FIGURE 13B sets forth a Logic Symbol of Differential Amplifier and Flip-Flop of FIGURE 2;

FIGURE 13C sets forth ya Truth Table of Flip-Flop 21 of FIGURE 2;

FIGURE 13D sets forth a circuit diagram differentiating networks and fifty millisecond guard circuit of FIG- URE 2;

FIGURES 13E-13H set forth the Denit-on of Signals used in the system;

FIGURE 14A sets forth a circuit diagram of Flip-Flop 7 of FIGURE 3;

FIGURES 14B and 14C set forth the logic symbols of Flip-Flop '7 of FIGURE 3;

FIGURE 14D sets forth a truth table of Flip-Flop 7 `of FIGURE 3;

FIGURE 14E sets forth a circuit diagram of Flip- Flop 1 of FIGURE 4;

FIGURE 14F sets forth a logic symbol of Flip-Flop 1 of FIGURE 4;

FIGURE 14G sets forth a circuit diagram of Flip-Flop 20 of FIGURE 12;

FIGURE 14H sets forth a logic symbol lof Flip-Flop 20 of FIGURE 12;

FIGURE 15A sets forth a circuit diagram of Print Control Circuits of FIGURE 6;

FIGURE 15B set forth a circuit diagram (typical) of NOR gates used in the system;

FIGURE 15C sets forth a logic symbol (typical) of NOR gates used inthe system;

FIGURE 15D sets forth a circuit diagram (typical) of A-ND gates used in the system;

FIGURE 15 yE sets forth a logic symbol (typical) of AND gates used in the system;

FIGURE 15F sets forth'a logic symbol (typical) of INHIBIT gate means used in the system;

FIGURE 16A sets forth a circuit diagram of Flip-Flop 19 of FIGURE 8;

FIGURE 16B sets forth a logic diagram of Flip-Flop 19 of FIGURE 8; and

FIGURE 17 sets forth an assembly diagram for FIG- URES 2-12.

GENERAL DESCRIPTION Referring to FIGURE 1, a block diagram of the novel scale system is shown thereat. The scale system basically comprises a scale proper 100, a computer 101, and a labeler 102. Computer 101 as shown comprises a plurality of functional circuits. The labeler 102 includes the novel adjustable price switches 120 and the printer 121. In use, the attendant adjusts the price switches 120, places the goods to be weighted on the scale 100, and the computer 101 enables the labeler 102 to print -a label containing the price per pound, the weight of the goods, and the total price.

The price switches 120 of the labeler may be adjusted for articles in a range extending from $.01 per pound to $4.99 per pound. The adjustment is effected by means of a dollars switch, a dimes switch, and a pennies switch on the scale (as shown in FIGURE 4 and described more fullyhereinafter). Adjustment of these switches mechanically turns the price per pound wheels in the printer 121 (FIGURES l, 7) to the correct position and adjusts the arms of dollars, dimes, and cents electrical switches (FIGURES 1, 4) to the correct position, whereby a forward counter 112 is selectively coupled through a logic circuit to the sequence circuit. Thereupon the operator places the item to be weighed on the scales. In the present embodiment, the weight may vary from .01 pound to 24.99 pounds. The fixed part of the scale 100l contains four groups of photoresistors, one group for each of the four digits of weight (FIGUR-E 2). The movable part of the scale 100 contains four tracks in registry with the photoresistors, each track comprising opaque and transparent regions. Light shining through the transparent regions actuates the photoresistors which reduces their resistance. Electrical signals are transmitted from the photoresistors to the differential amplifier 104, in a units distance binary reflected cyclic code.

The dilerential amplifiers 104 oper-ate associated flipilops 105. As long as the scale is in motion and has not settled, the weight control 123 comprising a flip-flop indicated as F19 only allows signals to pass from the flipiiops through NOR gates 107 which actuate the motion detector 108. The motion detector gives out a reset signal R to the whole system and inhibits the clock 109 so that the clock cannot give out clock pulses CP or F used for synchronizing and enabling purposes. Clock pulses are pulses of approximately ten microseconds width with approximately twenty microseconds between pulses. CP pulses are negative pulses v. to --12 v. to 0' v.) the trailing edges of which constitute positive going signals. F pulses are positive pulses (-12 v. to 0 v. to -12 v the trailing edges of which constitute negative going signals. A P- pulse through an inverter becomes a negative pulse with a positive going trailing edge.

After the scale 100y has settled, the motion detector 108 removes the reset signal-R, and removes the inhibit signal from the clock whereupon the clock `resumes the propagation of clock signals CP and IT to the system.

The weight control 123` receiving CP pulses then signals the Logic Sequence Circuitry 130, inhibits the NOR 4 gates 107, and enables the AND gates, and the code expressing the setting of the scale is passed through the code translator into the backward counter 111 comprising ip-ops indicated as F7, F8, F9, and F10 in a programmed manner.

This programming is controlled by the weight program 127 comprising ip-ilops indicated as F11 and F12. Since each flip-op has two positions, four states are determined. The iirst state selectively enables the scale sequence control 122 which in turn enables the ten pound photoresistors on the scale (FIGURE 2) whereby the tens-ofpounds digit of weight passes into the background counter 111, in combination form, in one step.

The background counter 111 signals the Logic Sequence Circuitry (LSC) 130 as to the digit registered therein. The Logic Sequence Circuitry signals the Weight Control 123 which signals the Scale Sequence Control 122 which disconnects the signal for the ten pound digit from the scale 100 to the Backward Counter 111.

Thereupon the Logic Sequence Circuitry (LSC) drives the Background Counter 111 back step-by-step until it reaches the zero position, to count the value therein.

This backward stepping by the Backward Counter 111 controls the Weight Sequence Circuit 131 (which is also programmed by the Weight Program 127) to operate the weight accumulator 116 in the stepping of a Decade C-ounter 118 to register the tens of pounds digit.

The Forward Counter 112 is a straight binary counter comprising flip-flops designated F1, F2, F3, and F4 and following every backward count of the backwar-d counter 111 goes through a stepping program, comprising a cornplete round of ten steps for the dollars digit of price, another round for the dimes digit vof price, and -another round for the cents digit of price. During the dollars round a partial product is fed via logic circuitry over the Price Switches (FIGURES 1 and 4), the Price Sequence Circuit 114 (see also FIGURE 5 and the Price Accumulators 115 (FIGURES 1 and 5) into the Decade Counters 117 (FIGURES 1 and 6) in accordance with the setting of the dollars switch (FIGURES 1 and 4). Because the weight digit being considered is tens of pounds this partial product steps the tens of dollars decade counter (FIGURE 6).

It should be observed that the Price Sequence Circuit 114 is controlled by the Weight Sequence Circuit 131 and also by the Price Program Circuit 126 comprising flipilops F5 and F6 which provide combinational positions, one for dollars, another for dimes, and another for cents.

During the next round of the forward counter 112 (the dimes round), a partial product will be fed into the dollars ydecade counter (FIGURE 6), as determined by the setting of the dimes price switch, which is such that the tens-of-pounds ybeing considered results in dollars.

During the next round of the forward counter 112 (the cents round), a partial product will be fed into the dimes decade counter (FIGURE 6).

The Forward Counter 112 keeps reporting its position to the LSC circuitry 130. Logic Sequence Circuitry, for purposes 'of brevity, will be referred to hereinafter by the letters LSC. The Forward Counter 112- having completed its th-ree rounds, the LSC 130` drives the Backward Counter 111 backward another step.

Thereupon the Forward Counter 112 goes through its three rounds a-gain and the same partial products are fed into the same deca-de counters.

This procedure continues until the Backward Counter 111 has reached the zero position whereupon the Backward Counter 111 is reset by LSC 130, the Weight Control 123 is conditioned Iby the `LSC 130 for the next digit of weight, and the Weight Program 127 comprising flipilops F11 and F12 takes its next sequential position representing pounds. The Scale Sequence Control 122 and the Weight Sequence Circuit 131 are now advanced one step.

The Scale Sequence Control 122 energizes the l lb. set of photoresistors iu the Scale (FIGURES 1 and 2) and the pound digit of weight is read into the Backward Counter 111.

Thereupon the Backward Counter is driven backward a step at a time, each step lbeing registered in the Decade Counters associated with weight. The Forward Counter 112 goes through its count program following each backward step of the Backward Counter 111. Due to the shifting of place value by the Price Sequence Circuit 114 under the inliuence of the Price Program 125 and Weight Program 127, partial products are fed into the dollars, dimes, and cents decade counters (see also FIGURE 6).

Thereupon the Scale Sequence Counter 122 energizes the .1 lb. photoresistor group in the Scale (see also FIG- URE 2) and a digit representing the number of tenthsof-a-pound is read into the Backward Counter 111. Thereupon the Backward Counter 111 is then driven backward a step at a time, each step being registered in the Decade Counters 118 associated with weight.

The Forward Counter 112 goes through its count program following each backward step of the Backward Counter 111. Due to the shifting of place value by the Price Sequence Circuit 114 under the influence of the Price Pr-ogram 126 and the Weight Program 127, partial products a-re fed into the dimes, cents, and tenths of a cent decade counters (FIGURE 6).

Thereupon the Scale Sequence Control 122 energizes the .01 lb. photoresistor group in the Scale (FIGURE 2) and a digit representing the number of hundredths-of-apound is read into the Backward Counter 111. The Backward Counter 111 is driven backward a step at a time, each step being registered in the Decade Counters 118 associated with weight. The Forward Counter 112 ygoes through its count program following each backward step of the Backward Counter 111.

Due to the shifting of place value by the Price Sequence Circuit 114 under the influence of the Price Program 126 `and the Weight Program 127, partial products are fed into the cents, tenths of a cent, and hundredths of a cent decade counters (FIGURE 6).

This is illustrated by the following table:

TABLE I Hundredtbs e Digressing, as the Backward Counter counts backward it actuates the Odd-Even Circuit 124 comprising ilip-op F13 via the LSC 130. The Odd-Even Circuit 124 keeps track of whether `the previous digit registered in the Backward Counter was odd or even (decimally considered) whereby the Code Translator 110 is enabled to effect the desired translation.

Returning from the digression, after all partial products have lbeen fed into the decade counters, which have carry provisions, it is necessary to round off to the nearest cent. Accordingly, the LSC 130 actuates the Round-olf circuit 125 comprising flip-flop F18 (FIGURES l and 1l) which conditions the Price Accumulator Circuit 115 to prepare the path to the tenths-of-a-cent decade counter. Thereupon the LSC 130 drives the Forward Counter 112 through a round during which ve counts are placed in the tenths of a cent decade counter. If the digit originally in the tenths of a cent decade counter was tive or higher there will be a carry to the cents decade counter for round off purposes.

With the Round-Off Circuit actuated, the weight and price programs 126, 127 cycles completed, and the Forward Counter 112 in the nine position (positions running froni 0-9), the LSC 130 actuates the Printer Start Control Circuit 128 comprising flip-flop F14, and releases the Round-Off Circuit 125.

The Print Start Control Circuit 128 actuates the Print Control Circuit 119 (FIGURE 6) which in turn actuates the Start Circuitry in the Printer 121. This actuates the Print Motor which, via slip clutch and gear means, drives the wheels and a Sequence Switch in the Printer in a single revolution in the counter-Clockwise direction.

At each position of the Sequence Switch 129, a signal is fed to the LSC 130 which in turn feeds a pulse through the Price and Weight accumulators 115, 116 into the Decade Counters 117, 118.

After each decade counter reaches its position 9, the next pulse into the decade counter results in a pulse outgoing therefrom which, via the Print Control Circuit 119, energizes an associated solenoid in the printer which stops the associated wheel at the proper position.

Thus, in effect, pulses equal in number to the tens complement is fed into each decade counter resulting in steps taken by the print wheel equal to one less than the tens complement when stoppage of the print wheel occurs. Such Iaction provides the nines complement number of steps taken by the print wheel so that with the characters on the print wheels in -reverse and advancing in the order 9, 8, 7, etc., the character to be printed corresponds to the original digit in the decade counter.

As a specific example, if the digit seven is in a given decade counter, an output from the decade counter occurs after three additional pulses input thereto. As the Iirst pulse occurs with the print wheel in the nine position the decade counter is driven to its position eight As the second pulse occurs with the print wheel in the eight position, the decade counter is driven to its nine position. As the third pulse occurs with the print wheel in the seven position, the decade counter is driven to its position zero whereupon the output therefrom effects the stopping of the print wheel. This may be summarized as follows:

When the motor has driven the wheels and sequence switch through the single revolution7 the motor controls a print bar which operates to print the determined price per pound, weight, an-d total price on the label 103.

The operator thereupon removes the package from the scale 100 and aixes the label thereto. As a result of the return of the Scale to normal, the computer 101 and printer 102 become reset.

DESCRIPTION OF BASIC CIRCUIT COMPONENTS A description of the different basic logic circuits used in the system is set forth hereat prior to the detailed Idescription of the operation of the specific circuitry of the computer. The basic circuitry includes NOR gates, AND gates, Diierential Amplifier, Differential Networks and Flip-Flops, each of which is briefly described hereat.

7 NOR gate A typical NOR gate used is shown in FIGURE 15B and comprises a transistor, such as transistor T16, biassed as shown by a plurality of inputs to the base, and an output connected to the collector of transistor T16. Any input may have volts or -12 volts thereon. The output will have approximately 0 volts or -12 volts thereon.

If all inputs have 0 volts thereon the transistor will be cut off and the output from the collector will be -12 volts. If any one of the inputs has -l2 volts thereon, the transistor will conduct and the output will have 0 volts thereon. A NOR gate with a single input, therefore, becomes an inverter. While typical values are shown for the NOR circuit, these values may change under varied conditions of loading inputwise and outputwise.

FIGURE C illustrates the logic symbol used for the NOR gate in the description which appears hereinafter.

If O volts is considered no input the operation of the Nor gate can be summarized as follows:

(l) If there are no inputs there will be an output.

(2) If there is any input there will |be no output.

AND gate AND gates are also used in the computer. A typical AND gate is shown in FIGURE 15D and as there shown comprises a plurality of inputs, each having a diode therein poled to conduct with 0 volts on the left thereof and negative voltage through a 2.4K -resistor on the right.

If 0 volt is on any input the output will -be at 0 volts.

If all inputs are at 12 volts, no diode will be conductin-g 'and the output will be at approximately -12 volts.

Differential ampli/fer and fiz'p-flop 2l (See FIGURES 2 and 13a) Referring to FIGURE 2, the leads marked 10 lb., 1 lb.-.l lb.-and .O1 lb. have either 0 volts or -12 volts potential thereon according to the condition of the Scale and the programming of the Scale Sequence Circuit 122 (FIGURE 8).

If 0 volts is on a given one of these leads, the input through an associated photoresistor, such as 217, and a rectifier, such as 231, to a Differential Amplifier, such as 235, will be 0 volts.

I'f -12 volts is on a given one of these leads, the input through an associated photo-resistor, such as 217, and a rectifier, such as 231, to a Differential Amplifier, such as 235, will be Igoverned by the resistance of the photoresistor.

Referring now to FIGURE 13A, the input lead of the Differential Amplifier is connected to the base of a transistor, such as T1. Accordingly the base of this transistor may be at 0 volts, high resistance l2 volts, with no light shining on the associated photoresistor, or lower resistance -12 volts, with light shining ou the associated photoresistor.

With the base at 0 volts or at high resistance l2 volts, the transistor is non-conducting and the emitter thereof is at Aapproximately +12 volts.

With the base thereof at low resistance -12 volts, the transistor fully conducts, raising the emitter potential to approximately -12 volts.

The emitter of the transistor T1 is connected to an input designated @D to Flip-Flop 21.

Flip-Flop 21 comprises a driven multivibrator having a pair of transistors T2, T3 including a first output lead X21 connected to the collector of the left transistor and a second output lead X connected to the collector of the right transistor. 'Z-I should be read X21 bar. The emitters are connected to zero potential, and lthe base elements are connected over volt duration (1.2K, 22K', 68K' between |12 and -12 volts). The collectors are connected yat the position of the 1.2K and 22K resistors. When the input is at -1-12 volts, the right transistor is cut off so that the collector thereof is at approximately -12 volts as determined by the left voltage divider comprising resistors 68K, 22K, and 1.2K.

The base of the left transistor is biassed negative with respect to the emitter by the left voltage divider, so that the left transistor is fully conducting, and collector (X21) is very close to 0 volts.

With input at 0 volts, the potential of X21 will be 0 volts, and the potential of X will be at -12 volts. If the input becomes -12 volts, as illustrated in DA of FIG- URE 13E, this -l2 volt through resistor 10K causes the right transistor to fully conduct, whereby X becomes 0 volt.

With the right transistor f-ully conducting, the upper end of the 22K resistor of the left voltage divider becomes 0 volts, whereby the base of the left transistor becomes approximately four volts positive with respect to the emitter, causing the left transistor to be cut off. With this transistor cut off, X21 is approximately -12 volt as determined by the right voltage divider.

Referring now to FIGURE 13B, the Differential Amplier and Flip-Flop 21 are shown in logic form suitable for use in the logic diagram of FIGURE 2, Flip-Flop 21 being turned clockwise ninety degrees. For convenience, the `upper part of the Flip-Flop 21 of FIGURE 13B is designated X21, and the lower part is designated X2-1.

FIGURE 13C comprises a truth table for Flip-Flop 21 which may be read as follows. With input at +12 volts, X21 will be at 0l volts and E at -12 volts. With input @D at -12 volts, X21 will be at -12 volts and X at 0 volts.

Dierentz'ation networks and fifty mllsecond guard circuit (See FIGURES 2 and 13D) When the scale is in motion, negative control pulses (such as shown in FIGURE 13E) are output from various of the Flip-Flop outputs X21, X21, X22, E, X23, K2?, X24, and (see FIGURE 2) to NOR gates, such as 243-250; 24U-247 connected thereto. As a result thereof negative contr-ol pulses such as shown in FIG- URE 13E output from the NOR gates enter the differentiating networks, such as 251-259 in the motion detector 108. Also, a No Load Sense (NLS) lead from the scale is coupled to the differentiating network 251. When the scale goes off-normal, or returns to normal, `a negative -pulse appears on lead NLS. Referring now to FIGURE 13D, the inputs from the NOR gates, such as 240-247 and from the No Load Sense lead NLS to the different networks 251-259 are shown thereat.

As negative pulses come into the differentiating circuits 251, 259, the trailing edges thereof which constitute positive going signals pass through the associated condenser, such -as C1, and rectifier, such as R1, poled to pass positive going pulses to the fifty Millisecond Guard Circuit which comprises a first-monostable circuit M1 of five millisecond delay at the left connected to drive a second monostable circuit M2 of fifty milliseconld delay at the right.

In the first lmonostable circuit M1, lbiassed as shown, transistor T4 is normally conducting due to advantage bias-wise given it by the diode D1 in the emitter circuit of transistor T5 and the 33K resistor from OV whereby the emitter of T4 tends to be more positive with lrespect to its base than the emitter of T5 does with respect to its base. With transistor T4 conducting, the collector thereof is only about .2 volt more negative than the emitter. As the collector of transistor T4 is directly connected to the base of transistor T5, the base of T5 would be at about \-l1.8 volts. In that approximately .6- volt drop tends to occur across the diode D1, the emitter-base path of transistor T5 would be reverse biassed.

In the second monostable circuit M2 the emitters of both transistors T6, T7 are connected to O volt and the base yof transistor T6 is biassed more negative with respect to its emitter than the base of T7 is with respect 

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